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Question #43461

Difficulty: 8/10 | 🟢 Free

The Question

A logic circuit consists of a two-input NAND gate with infinite input impedance. The gate registers a logic HIGH (1) if the input voltage V≥2.0 VV \ge 2.0 \text{ V} relative to ground, and a logic LOW (0) if V<2.0 VV < 2.0 \text{ V}. Input A is connected to the cathode of photoelectric Cell A, and Input B is connected to the cathode of photoelectric Cell B. The anodes of both cells are grounded. Cell A has a work function ΦA=2.5 eV\Phi_A = 2.5 \text{ eV} and is illuminated by light of variable frequency νA\nu_A. Cell B has a work function ΦB=2.2 eV\Phi_B = 2.2 \text{ eV} and is illuminated by light of fixed wavelength λB=310 nm\lambda_B = 310 \text{ nm} with a continuously increasing intensity IBI_B. Initially, νA\nu_A is zero. What is the minimum frequency νA\nu_A required to switch the NAND gate output from HIGH (1) to LOW (0)? (Take hc=1240 eV⋅nmhc = 1240 \text{ eV}\cdot\text{nm} and Planck's constant h=4.14×10−15 eV⋅sh = 4.14 \times 10^{-15} \text{ eV}\cdot\text{s})

Options

  • A.

    1.09×1015 Hz1.09 \times 10^{15} \text{ Hz}

  • B.

    6.04×1014 Hz6.04 \times 10^{14} \text{ Hz}

  • C.

    1.57×1015 Hz1.57 \times 10^{15} \text{ Hz}

  • D.

    \text{The output cannot be switched to LOW for any value of } \nu_A

Check Your Answer

Correct Answer

Step-by-Step Solution

Explanation

How the Examiner Thinks

Intuition_Breaker

Train your brain to resist "obvious" answers that are designed to deceive your intuition.

Concepts Behind This Question

Logic Gate Boolean Algebra|Einstein's Photoelectric Equation|Stopping Potential Independence

Why This Question Is Tricky

Common Mistakes

This question tests the decoupling of photocurrent from stopping potential in the photoelectric effect, integrated with Boolean logic.

Students often misapply classical wave theory, assuming that increasing the light intensity on Cell B will eventually increase the input voltage to a logic HIGH state.

However, for a high-impedance input, the steady-state voltage is strictly determined by the stopping potential, which depends only on the incident photon energy (frequency) and work function, not intensity.

Because Cell B's stopping potential (1.8 V) is below the logic threshold (2.0 V), Input B is permanently stuck at logic LOW.

Consequently, the NAND gate output remains permanently HIGH, rendering any adjustments to Cell A's frequency irrelevant.

The trap option (A) catches students who only calculate the threshold for Cell A while falsely assuming Cell B is already HIGH due to its high intensity.

Quick Facts About This Question

Question Information

SubjectPhysics
ChapterSemiconductor Electronics: Materials, Devices, and Simple Circuits - Class 12
ConceptLogic Gate Boolean Algebra
Difficulty8
Cognitive Load7
Target Solve Time160 sec
AccessFree